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Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency.

, , and . IEEE Trans. Computers, 70 (9): 1388-1400 (2021)

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Automatic multi-layer integration in optical-circuit-packet transport network., , , , and . ICTC, page 909-910. IEEE, (2014)Virtualization-Based Efficient TSV Repair for 3-D Integrated Circuits., , , , , and . IEEE Access, (2020)PCE based Network Management Architecture for GMPLS and non-GMPLS based Transport Network., , , , , and . International Conference on Internet Computing, page 158-164. CSREA Press, (2010)Virtual-Tile-Based Flip-Flop Alignment Methodology for Clock Network Power Optimization., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1256-1268 (2020)CEnT: An Efficient Architecture to Eliminate Intra-Array Write Disturbance in PCM., , , and . IEEE Trans. Computers, 71 (5): 992-1007 (2022)Pattern-Aware Encoding for MLC PCM Storage Density, Energy Efficiency, and Performance Enhancement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (9): 1855-1865 (2020)Network Management Services in GSMP Open Interface., , , and . Human.Society@Internet 2003, volume 2713 of Lecture Notes in Computer Science, page 558-565. Springer, (2003)Multi-layer resource and path management in MPLS-TP based packet and optical switched multi-layer transport network., , and . ICTC, page 874-879. IEEE, (2015)Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency., , and . IEEE Trans. Computers, 70 (9): 1388-1400 (2021)Effective Write Disturbance Mitigation Encoding Scheme for High-density PCM., , and . DATE, page 1490-1495. IEEE, (2020)