( en | de | ru )

 

Disambiguation of "Chakraborty, Koushik"

Author of the publication

copydeleteadd this publication to your clipboard
Detection of Anomaly Detection with high dimensional data using volume and velocity aspects.

, , , , , and . ICIMMI, page 34:1-34:6. ACM, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Koushik Biswas

Koushik Chakrabarty

Sourav Chakraborty

Dipanjan Chakraborty

Anirban Chakraborty

 

Other publications of authors with the same name

Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System., , , , , , and . FMICS, volume 12863 of Lecture Notes in Computer Science, page 232-248. Springer, (2021)BoostNoC: power efficient network-on-chip architecture for near threshold computing., , , and . ICCAD, page 124. ACM, (2016)Stack Aware Threshold Voltage Assignment in 3-D Multicore Designs., and . IEEE Trans. Very Large Scale Integr. Syst., 20 (3): 512-522 (2012)STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit., , , , and . DAC, page 1-6. IEEE, (2023)Mixed-mode multicore reliability., , and . ASPLOS, page 169-180. ACM, (2009)A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization., , , and . VLSI Design, page 159-164. IEEE Computer Society, (2011)DOC: Fast and accurate congestion analysis for global routing., , and . ICCD, page 508-509. IEEE Computer Society, (2012)Topologically homogeneous power-performance heterogeneous multicore systems., and . DATE, page 125-130. IEEE, (2011)HCI-tolerant NoC router microarchitecture., , , and . DAC, page 40:1-40:10. ACM, (2013)Power-Performance Yield optimization for MPSoCs using MILP., , and . ISQED, page 764-771. IEEE, (2012)