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Design challenges for nano-scale devices., , , and . ESSDERC, page 69-72. IEEE, (2012)ExPACO: detection of an extended pattern under nonstationary correlated noise by patch covariance modeling., , , , and . EUSIPCO, page 1-5. IEEE, (2019)Thermo-mechanical study of a 2.5D passive silicon interposer technology: Experimental, numerical and In-Situ stress sensors developments., , , , , , , , , and 1 other author(s). 3DIC, page 1-7. IEEE, (2013)Model order reduction methods for geometrically nonlinear structures: a review of nonlinear techniques., , and . CoRR, (2021)Sub-1V, Robust and Compact 6T SRAM cell in Double Gate MOS technology., , and . ISCAS, page 2778-2781. IEEE, (2007)Ultra low voltage design considerations of SOI SRAM memory cells., and . ISCAS (4), page 4094-4097. IEEE, (2005)Design, Fabrication and Dynamic Testing of Insect-Inspired Nano Air Vehicles., , , , , , , , and . MIXDES, page 17-22. IEEE, (2023)Resistive memories: Which applications?, , , , , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)OxRAM-based non volatile flip-flop in 28nm FDSOI., , , , , and . NEWCAS, page 141-144. IEEE, (2014)Impact of Random Telegraph Signals on 6T high-density SRAM in 28nm UTBB FD-SOI., , , , and . ESSDERC, page 94-97. IEEE, (2014)