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Disambiguation of "Azevedo, Arnaldo"

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Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.

, , , , , , , , , , , and . SIGBED Rev., 10 (3): 23-34 (2013)

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Arnaldo Cacaci

Arnaldo Baldacci

Arnaldo Alvarez Brito

Raphael Arnaldo Aponte

Elzivir Azevedo Guerra

 

Other publications of authors with the same name

The SARC Architecture., , , , , , , , , and . IEEE Micro, 30 (5): 16-29 (2010)Analysis of video filtering on the cell processor., , , , and . ISCAS, page 488-491. IEEE, (2008)X4CP32: A New Parallel/Reconfigurable General-Purpose Processor., , and . SBAC-PAD, page 260-268. IEEE Computer Society, (2003)A Multidimensional Software Cache for Scratchpad-Based Systems., and . Int. J. Embed. Real Time Commun. Syst., 1 (4): 1-20 (2010)Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow., , , , , , , , , and 2 other author(s). SIGBED Rev., 10 (3): 23-34 (2013)When reconfigurable architecture meets network-on-chip., , and . SBCCI, page 216-221. ACM, (2004)MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV., , , and . ISCAS, page 1617-1620. IEEE, (2007)An efficient software cache for H.264 motion compensation., and . SoC, page 147-150. IEEE, (2009)A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile., , , , , and . J. Real Time Image Process., 8 (1): 127-140 (2013)FPGA Design of A H.264/AVC Main Profile Decoder for HDTV., , , , , , and . FPL, page 1-6. IEEE, (2006)