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COLA: Characterizing and Optimizing the Tail Latency for Safe Level-4 Autonomous Vehicle Systems.

, , and . CoRR, (2023)

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String Figure: A Scalable and Elastic Memory Network Architecture., , , , and . HPCA, page 647-660. IEEE, (2019)Leveraging MLC STT-RAM for energy-efficient CNN training., and . MEMSYS, page 279-290. ACM, (2018)Enhancing Model Parallelism in Neural Architecture Search for Multidevice System., , , , , and . IEEE Micro, 40 (5): 46-55 (2020)Buri: Scaling Big-Memory Computing with Hardware-Based Memory Expansion., , , , , , , and . ACM Trans. Archit. Code Optim., 12 (3): 31:1-31:24 (2015)Safety-Critical Scenario Generation Via Reinforcement Learning Based Editing., , , and . CoRR, (2023)Enabling Efficient Large-Scale Deep Learning Training with Cache Coherent Disaggregated Memory Systems., , , and . HPCA, page 126-140. IEEE, (2022)Learning Bounded Context-Free-Grammar via LSTM and the Transformer: Difference and Explanations., , , , and . CoRR, (2021)Kiln: closing the performance gap between systems with and without persistence support., , , , and . MICRO, page 421-432. ACM, (2013)ThyNVM: enabling software-transparent crash consistency in persistent memory systems., , , , , and . MICRO, page 672-685. ACM, (2015)Implementing binary neural networks in memory with approximate accumulation., , , , , and . ISLPED, page 247-252. ACM, (2020)