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Disambiguation of "Chiou, Lih-Yih"

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Crosstalk-insensitive via-programming ROMs using content-aware design framework.

, , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (6): 443-447 (2006)

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Min-Ching Chiou

Franz Lihl

Irmgard Chiout

Yiheyis Tasissa

Gabriel Yihune

 

Other publications of authors with the same name

A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs., , , , and . VLSI-DAT, page 1-4. IEEE, (2019)Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (9): 1234-1238 (2018)Temperature gradient-aware thermal simulator for three-dimensional integrated circuits., and . IET Comput. Digit. Tech., 11 (5): 190-196 (2017)A full code-patterns coverage high-speed embedded ROM using dynamic virtual guardian technique., , and . IEEE J. Solid State Circuits, 41 (2): 496-506 (2006)Energy-efficient adaptive clocking dual edge sense-amplifier flip-flop., , and . ISCAS, IEEE, (2006)Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications., , and . DATE, page 10096-10103. IEEE Computer Society, (2003)Synthesis of application-specific highly efficient multi-mode cores for embedded systems., , and . ACM Trans. Embed. Comput. Syst., 4 (1): 168-188 (2005)Ultra-Low Standby Power SRAM with Adaptive Data-Retention-Voltage-Regulating Scheme., , , and . ISCAS, page 1-4. IEEE, (2018)A Reliable Delay-Based Physical Unclonable Function with Dark-Bit Avoidance., , and . ISCAS, page 1-4. IEEE, (2019)A Data-Traffic Aware Dynamic Power Management for General-Purpose Graphics Processing Units., , and . ISCAS, page 1-5. IEEE, (2019)