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Disambiguation of "Mikolajick, Thomas"

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Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices.

, , , , , , , , , , , and . VLSI-SoC, page 180-183. IEEE, (2018)

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Thomas Mikolajick

Thomas Thomas

Thomas Baron

Untersuchungen an ungeschädigten und durch Pilzbefall geschädigten Nadelholzbauteilen mit ausgewählten Prüfverfahren. TU Dresden, (2009)

Thomas Harasim

Die Rolle des nucleostemin-Gens in dem Prozess der Ribosomenbiogenese. Uni München, (2009)

Thomas Böttcher

Naturstoffe und ihre Derivate als molekulare Sonden: Identifikation ihrer Angriffsziele und Inhibition der Virulenz in pathogenen Bakterien. Uni München, (2009)
 

Other publications of authors with the same name

Scanning spreading resistance microscopy for failure analysis of nLDMOS devices with decreased breakdown voltage., , , , , , , , and . Microelectron. Reliab., 54 (9-10): 2128-2132 (2014)2021 Roadmap on Neuromorphic Computing and Engineering., , , , , , , , , and 46 other author(s). CoRR, (2021)Extraction of the active acceptor concentration in (pseudo-) vertical GaN MOSFETs using the body-bias effect., , , , , , , , , and . Microelectron. J., (2019)Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors., , , , , , , , , and 6 other author(s). DATE, page 1-6. IEEE, (2023)END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator., , , , , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 175-203. Springer, (2021)Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits., , , , , , and . DATE, page 169-174. IEEE, (2016)A pseudo-memcapacitive neurotransistor for spiking neural networks., , , , , , and . MOCAST, page 1-5. IEEE, (2023)Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory., , , , , , , , and . ESSDERC, page 118-121. IEEE, (2019)In-depth electrical characterization of carrier transport in ambipolar Si-NW Schottky-barrier FETs., , , , , , , and . ESSDERC, page 304-307. IEEE, (2017)Localization of temperature sensitive areas on analog circuits., , and . Microelectron. J., 45 (6): 734-739 (2014)