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Disambiguation of "Yoo, Hoi-Jun"

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A 79 pJ/b 80 Mb/s Full-Duplex Transceiver and a 42.5µW 100 kb/s Super-Regenerative Transceiver for Body Channel Communication.

, , , , , , , and . IEEE J. Solid State Circuits, 51 (1): 310-317 (2016)

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Wolfgang Hoi

Doan Hoi

Jun Jun Lu

Chanyeol Yoo

Angelina Yoo

 

Other publications of authors with the same name

A multimodal stress monitoring system with canonical correlation analysis., , , , , and . EMBC, page 1263-1266. IEEE, (2015)CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture., , , and . AICAS, page 38-41. IEEE, (2019)Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification., , and . ASP-DAC, page 9-10. ACM, (2001)A practical method to use eDRAM in the shared bus packet switch., , and . GLOBECOM, page 2303-2307. IEEE, (2002)A 86mW 98GOPS ANN-searching processor for Full-HD 30fps video object recognition with zeroless locality-sensitive hashing., , and . ESSCIRC, page 450-453. IEEE, (2012)A 20 µW contact impedance sensor for wireless body-area-network transceiver., , , and . CICC, page 1-4. IEEE, (2011)Mobile Deep Learning Processors on the Edge.. CICC, page 1-91. IEEE, (2019)An 81.6 GOPS Object Recognition Processor Based on NoC and Visual Image Processing Memory., , , , and . CICC, page 443-446. IEEE, (2007)7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation., , , , , , and . ISSCC, page 140-142. IEEE, (2020)A 79 pJ/b 80 Mb/s Full-Duplex Transceiver and a 42.5µW 100 kb/s Super-Regenerative Transceiver for Body Channel Communication., , , , , , , and . IEEE J. Solid State Circuits, 51 (1): 310-317 (2016)