( en | de | ru )

 

Disambiguation of "Banerjee, Swapna"

Author of the publication

copydeleteadd this publication to your clipboard
A VLSI array architecture for Hough transform.

, and . Pattern Recognit., 34 (7): 1503-1512 (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Swapna Upadhyay

Swapna Bhattacharya

Swapna Pradhan

Abhishek Banerjee

Prabuddha Banerjee

 

Other publications of authors with the same name

A High-Precision Low-Area Unified Architecture for Lossy and Lossless 3D Multi-Level Discrete Wavelet Transform., , and . IEEE Trans. Circuits Syst. Video Techn., 28 (9): 2386-2396 (2018)A Low-Error, Memory-Based Fast Binary Logarithmic Converter., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (10): 2129-2133 (2020)FPGA-accelerated adaptive projection-based image registration., and . J. Real Time Image Process., 18 (1): 113-125 (2021)Design of static and dynamic translinear circuits based on CMOS CCII translinear loops., , , and . ICECS, page 1-4. IEEE, (2005)FPGA based accelerated 3D affine transform for real-time image processing applications., , and . Comput. Electr. Eng., (2016)VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000., and . Integr., 45 (1): 1-8 (2012)A high throughput pass parallel block decoder architecture for JPEG 2000 that prevents stalling in the decoding process., and . Integr., (2020)Efficient Hardware Implementation of Encoder and Decoder for Golay Code., and . IEEE Trans. Very Large Scale Integr. Syst., 23 (9): 1965-1968 (2015)On the Probability Distribution of Round-off Errors Propagated in Tabular Differences., and . Aust. Comput. J., 3 (2): 60-68 (1971)An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (6): 2275-2287 (2019)