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Disambiguation of "Lewis, David M."

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The Stratix II logic and routing architecture.

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J. D. Lewis-Williams

David M Eche

David M Eche

David M Allen

David M Stec

 

Other publications of authors with the same name

Procedural Texture Mapping on FPGAs., and . FPGA, page 112-120. ACM, (1999)The StratixTM routing and logic architecture., , , , , , , , , and 4 other author(s). FPGA, page 12-20. ACM, (2003)Using sparse crossbars within LUT., and . FPGA, page 59-68. ACM, (2001)A multiple-strength multiple-delay compiled-code logic simulator., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1937-1946 (1993)A hierarchical compiled code event-driven logic simulator.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (6): 726-737 (1991)Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA Performance., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (11): 2153-2166 (2019)Architectural enhancements in Stratix-IIITM and Stratix-IVTM., , , , , , and . FPGA, page 33-42. ACM, (2009)The Stratix II logic and routing architecture., , , , , , , , , and 13 other author(s). FPGA, page 14-20. ACM, (2005)Hector: A Hierarchically Structured Shared-memory Multiprocessor., , , and . Computer, 24 (1): 72-79 (1991)DP-FPGA: An FPGA Architecture Optimized for Datapaths., and . VLSI Design, 4 (4): 329-343 (1996)