( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting.

, , , , и . IEEE Trans. Computers, 71 (12): 3115-3126 (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Bong-Ho Ahn

Ahn-Jung Song

Jung Ho Kim

Ki-Ho Jung

Ho-Jung Hwang

 

Другие публикации лиц с тем же именем

Human Silhouette Extraction Method Using Region Based Background Subtraction., и . MIRAGE, том 4418 из Lecture Notes in Computer Science, стр. 412-420. Springer, (2007)Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices., , , , , и . IEEE Access, (2018)Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs., , и . IEEE Trans. Very Large Scale Integr. Syst., 21 (10): 1863-1877 (2013)Replication-aware leakage management in chip multiprocessors with private L2 cache., , и . ISLPED, стр. 135-140. ACM, (2010)Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs., , , и . IEEE Comput. Archit. Lett., 8 (1): 5-8 (2009)Data parallel address architecture., и . IEEE Comput. Archit. Lett., 5 (1): 30-33 (2006)MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 21 (6): 1013-1026 (2013)Evaluation of Performance Unfairness in NUMA System Architecture., , , , и . IEEE Comput. Archit. Lett., 16 (1): 26-29 (2017)Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules., , , , и . IEEE Micro, 36 (1): 24-34 (2016)Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization., , , , , , , , и . IEEE Access, (2021)