( en | de | ru )

 

Disambiguation of "Yan, Na"

Author of the publication

copydeleteadd this publication to your clipboard
A Novel LNTA-first Carrier Leakage Suppression Receiver Front-End with Low Noise Figure and High Sensitivity for UHF RFID Reader.

, , , and . RFID, page 97-102. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Yan Yan

Na Na r

Na Wei

Na Zhang

Na Lin

 

Other publications of authors with the same name

P300 Feature Extraction for Visual Evoked EEG Based on Wavelet Transform., and . AICI (2), volume 7003 of Lecture Notes in Computer Science, page 561-567. Springer, (2011)MSCET: A Multi-Scenario Offloading Schedule for Biomedical Data Processing and Analysis in Cloud-Edge-Terminal Collaborative Vehicular Networks., , , , , , and . CoRR, (2022)DAP: Efficient Detection Against Probabilistic Cloning Attacks in Anonymous RFID Systems., , , , , , and . IEEE Trans. Ind. Informatics, 18 (1): 345-355 (2022)Trust-aware generative adversarial network with recurrent neural network for recommender systems., , , , , and . Int. J. Intell. Syst., 36 (2): 778-795 (2021)A 10-bit 563-fs Step Constant-Slope Digital-to-Time Converter in 40-nm CMOS With Nonlinearity Cancellation and Range Extension Techniques., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 526-536 (February 2024)基于用户相似度和特征分化的广告点击率预测研究 (Study on Advertising Click-through Rate Prediction Based on User Similarity and Feature Differentiation)., , and . 计算机科学, 44 (2): 283-289 (2017)High-Efficiency Differential RF Front-End for a Gen2 RFID Tag., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (4): 189-194 (2011)A low-power low-noise amplifier for EEG/ECG signal recording applications., , and . ASICON, page 145-148. IEEE, (2011)A 0.8ps minimum-resolution sub-exponent TDC for ADPLL in 0.13µm CMOS., , , and . ASICON, page 602-605. IEEE, (2011)A low power TDC with 0.5ps resolution for ADPLL in 40nm CMOS., , , , , and . ASICON, page 1-4. IEEE, (2015)