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Disambiguation of "Morf, Thomas"

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A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links.

, , , , , , , , , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 58 (4): 1074-1086 (2023)

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Gregor Morfill

Geert Morf

Ulrich Morf

Heinrich Morf

Jan Morf

 

Other publications of authors with the same name

A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 47 (4): 897-910 (2012)Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology., , , , , , , and . ESSCIRC, page 67-70. IEEE, (2021)23.6 A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path., , , , , , , , , and 1 other author(s). ISSCC, page 408-409. IEEE, (2016)A 5.7mW/Gb/s 24-to-240Ω 1.6Gb/s thin-oxide DDR transmitter with 1.9-to-7.6V/ns clock-feathering slew-rate control in 22nm CMOS., , , , , , , , and . ISSCC, page 310-311. IEEE, (2013)A 24-to-72GS/s 8b time-interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at nyquist in 14nm CMOS FinFET., , , , , , , , , and . ISSCC, page 358-360. IEEE, (2018)Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders., , , , , , , , , and 3 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (10): 3529-3542 (2018)A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (12): 3458-3473 (2017)A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 53 (4): 1227-1237 (2018)A 100-mW 4×10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects., , , , , , , , and . IEEE J. Solid State Circuits, 40 (12): 2667-2679 (2005)A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology., , , , , , , , , and 11 other author(s). ISSCC, page 324-326. IEEE, (2012)