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A Design-Optimized Continuous-Time Delta-Sigma ADC for WLAN Applications.

, , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (1): 209-217 (2007)

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Analog design procedures for channel lengths down to 20 nm.. ICECS, page 337-340. IEEE, (2013)Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits., , and . DAC, page 445-449. ACM Press, (1995)Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation., , , , and . ISCAS, page 25-28. IEEE, (1994)Efficient analysis of slow-varying oscillator dynamics., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (8): 1457-1467 (2004)AMGIE-A synthesis environment for CMOS analog integrated circuits., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (9): 1037-1058 (2001)Identifying the Bottlenecks to the RF Performance of FinFETs., , , , , , and . VLSI Design, page 111-116. IEEE Computer Society, (2010)An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection., , , , and . DATE, page 81-86. EDA Consortium, San Jose, CA, USA, (2007)Analog interfaces for digital signal processing systems., and . The Kluwer international series in engineering and computer science Kluwer, (1993)An intelligent design system for analogue integrated circuits., , and . EURO-DAC, page 169-173. IEEE Computer Society, (1990)Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation., and . ISCAS, page 1381-1384. IEEE, (1993)