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Disambiguation of "Pal, Subhankar"

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Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms.

, , , , , , and . IEEE Comput. Archit. Lett., 23 (1): 108-111 (January 2024)

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Subhankar Bedanta

Michael Pal

Aprameyo Pal

Pal Dragos

Andrea Pál

 

Other publications of authors with the same name

Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (4): 986-998 (2022)A Holistic Solution for Reliability of 3D Parallel Systems., , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (1): 23:1-23:27 (2022)xURLCC in 6g with meshed RAN., , , , , and . CoRR, (2023)SparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator., , , , , and . MICRO, page 1005-1021. ACM, (2021)HE-PEx: Efficient Machine Learning under Homomorphic Encryption using Pruning, Permutation and Expansion., , , , , , , , , and 1 other author(s). CoRR, (2022)A New Design of an N-Bit Reversible Arithmetic Logic Unit., , , , and . ISED, page 224-225. IEEE Computer Society, (2014)Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective., , , and . ISPASS, page 202-211. IEEE, (2019)HETSIM: Simulating Large-Scale Heterogeneous Systems using a Trace-driven, Synchronization and Dependency-Aware Framework., , , , , , , and . IISWC, page 13-24. IEEE, (2020)Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators., , , and . ISPASS, page 240-242. IEEE, (2021)Towards Closing the Programmability-Efficiency Gap using Software-Defined Hardware.. University of Michigan, USA, (2021)