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Power-constrained test scheduling for multi-clock domain SoCs.

, , и . DATE, стр. 297-302. European Design and Automation Association, Leuven, Belgium, (2006)

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Power-constrained test scheduling for multi-clock domain SoCs., , и . DATE, стр. 297-302. European Design and Automation Association, Leuven, Belgium, (2006)Test Scheduling for Multi-Clock Domain SoCs under Power Constraint., , и . IEICE Trans. Inf. Syst., 91-D (3): 747-755 (2008)