( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid SAR ADC with time-to-digital converter.

, , и . ISCAS, стр. 2429-2432. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Erkan en

Shuo-Chun Hsieh

Shelley Ching-yu Hsieh

Ju-Lan Hsieh

Chih-sheng Hsieh

 

Другие публикации лиц с тем же именем

A 0.5 V 12-bit SAR ADC using adaptive timedomain comparator with noise optimization., , и . A-SSCC, стр. 213-216. IEEE, (2017)An integrated CMOS optical sensing chip for multiple bio-signal detections., , , , и . A-SSCC, стр. 197-200. IEEE, (2016)A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization., , и . IEEE J. Solid State Circuits, 53 (10): 2763-2771 (2018)A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation., , , , , , , , , и 5 other автор(ы). ISSCC, стр. 136-137. IEEE, (2023)A 0.44-fJ/Conversion-Step 11-Bit 600-kS/s SAR ADC With Semi-Resting DAC., и . IEEE J. Solid State Circuits, 53 (9): 2595-2603 (2018)A 0.4V 13b 270kS/S SAR-ISDM ADC with an opamp-less time-domain integrator., и . ISSCC, стр. 240-242. IEEE, (2018)A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid SAR ADC with time-to-digital converter., , и . ISCAS, стр. 2429-2432. IEEE, (2015)A 0.44fJ/conversion-step 11b 600KS/s SAR ADC with semi-resting DAC., и . VLSI Circuits, стр. 1-2. IEEE, (2016)A 0.4-V 13-bit 270-kS/s SAR-ISDM ADC With Opamp-Less Time-Domain Integrator., и . IEEE J. Solid State Circuits, 54 (6): 1648-1656 (2019)A CMOS Imager for Reflective Pulse Oximeter with Motion Artifact and Ambient Interference Rejections., , , и . A-SSCC, стр. 25-26. IEEE, (2018)