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Disambiguation of "Hsieh, Sung-En"

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A 0.4-V 13-bit 270-kS/s SAR-ISDM ADC With Opamp-Less Time-Domain Integrator.

, and . IEEE J. Solid State Circuits, 54 (6): 1648-1656 (2019)

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Erkan en

Shuo-Chun Hsieh

Shelley Ching-yu Hsieh

Ju-Lan Hsieh

Chih-sheng Hsieh

 

Other publications of authors with the same name

A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization., , and . IEEE J. Solid State Circuits, 53 (10): 2763-2771 (2018)A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation., , , , , , , , , and 5 other author(s). ISSCC, page 136-137. IEEE, (2023)A 0.5 V 12-bit SAR ADC using adaptive timedomain comparator with noise optimization., , and . A-SSCC, page 213-216. IEEE, (2017)An integrated CMOS optical sensing chip for multiple bio-signal detections., , , , and . A-SSCC, page 197-200. IEEE, (2016)A 0.4V 13b 270kS/S SAR-ISDM ADC with an opamp-less time-domain integrator., and . ISSCC, page 240-242. IEEE, (2018)A 0.44-fJ/Conversion-Step 11-Bit 600-kS/s SAR ADC With Semi-Resting DAC., and . IEEE J. Solid State Circuits, 53 (9): 2595-2603 (2018)A 0.3-V 0.705-fJ/Conversion-Step 10-bit SAR ADC With a Shifted Monotonic Switching Procedure in 90-nm CMOS., and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (12): 1171-1175 (2016)A 0.4-V 13-bit 270-kS/s SAR-ISDM ADC With Opamp-Less Time-Domain Integrator., and . IEEE J. Solid State Circuits, 54 (6): 1648-1656 (2019)A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid SAR ADC with time-to-digital converter., , and . ISCAS, page 2429-2432. IEEE, (2015)A 0.44fJ/conversion-step 11b 600KS/s SAR ADC with semi-resting DAC., and . VLSI Circuits, page 1-2. IEEE, (2016)