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Correlation Prefetching with a User-Level Memory Thread., , and . IEEE Trans. Parallel Distributed Syst., 14 (6): 563-580 (2003)MILR: Mathematically Induced Layer Recovery for Plaintext Space Error Correction of CNNs., , and . CoRR, (2020)SecureME: a hardware-software approach to full system security., , , and . ICS, page 108-119. ACM, (2011)Write-Aware Management of NVM-based Memory Extensions., , and . ICS, page 9:1-9:12. ACM, (2016)Single-level integrity and confidentiality protection for distributed shared memory multiprocessors., , , , and . HPCA, page 161-172. IEEE Computer Society, (2008)Making secure processors OS- and performance-friendly., , , and . ACM Trans. Archit. Code Optim., 5 (4): 16:1-16:35 (2009)Streamlining Integrity Tree Updates for Secure Persistent Non-Volatile Memory., , , and . CoRR, (2020)Improving Cost, Performance, and Security of Memory Encryption and Authentication., , , , and . ISCA, page 179-190. IEEE Computer Society, (2006)CHOP: Adaptive filter-based DRAM caching for CMP server platforms., , , , , , , , and . HPCA, page 1-12. IEEE Computer Society, (2010)STM: Cloning the spatial and temporal memory access behavior., and . HPCA, page 237-247. IEEE Computer Society, (2014)