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Disambiguation of "Gupta, Sumeet Kumar"

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Insinhts on the DC Characterization of Ferroelectric Field-Effect-Transistors.

, , , , , and . DRC, page 1-2. IEEE, (2018)

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Ashutosh Kumar Gupta

Ajay Kumar Gupta

Manoj Kumar Gupta

Rajender Kumar Gupta

Surender Kumar Gupta

 

Other publications of authors with the same name

High-performance low-energy STT MRAM based on balanced write scheme., , and . ISLPED, page 9-14. ACM, (2012)Utilization of Negative-Capacitance FETs to Boost Analog Circuit Performances., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (12): 2855-2860 (2019)Analysis of Functional Oxide based Selectors for Cross-Point Memories., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (12): 2222-2235 (2016)ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2533-2545 (2019)Device/circuit interactions at 22nm technology node., , and . DAC, page 97-102. ACM, (2009)Dual pillar spin-transfer torque MRAMs for low power applications., , , , , and . JETC, 9 (2): 14:1-14:17 (2013)Read-enhanced spin memories augmented by phase transition materials (Invited)., and . MWSCAS, page 993-996. IEEE, (2017)Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed., , , , , , , and . ISVLSI, page 296-301. IEEE Computer Society, (2014)TiM-DNN: Ternary in-Memory accelerator for Deep Neural Networks., , and . CoRR, (2019)An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires., , , and . ICICDT, page 117-120. IEEE, (2018)