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A Variable-Latency Architecture for Accelerating Deterministic Approaches to Stochastic Computing.

, and . ACSSC, page 608-613. IEEE, (2019)

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FFT Implementation with Fused Floating-Point Operations., and . IEEE Trans. Computers, 61 (2): 284-288 (2012)A variable-precision interval arithmetic processor., and . ASAP, page 248-258. IEEE, (1994)Merged CORDIC Algorithm., and . ISCAS, page 1988-1991. IEEE, (1995)A self-testing method for the pipelined A/D converter., , and . ISCAS (1), page 109-112. IEEE, (2003)Fault-Tolerant Neural Architectures: The Use of Rotated Operands., , and . ISCAS, page 2201-2204. IEEE, (1995)A fast hybrid carry-lookahead/carry-select adder design., , and . ACM Great Lakes Symposium on VLSI, page 149-152. ACM, (2001)Arithmetic circuit design with memristor based high fan-out logic gates., and . UEMCON, page 1-6. IEEE, (2016)Calculators.. IEEE Ann. Hist. Comput., 19 (1): 74-75 (1997)Improved non-restoring square root algorithm with dual path calculation., and . ACSSC, page 1243-1246. IEEE, (2014)Memristor Adder Design., and . MWSCAS, page 314-317. IEEE, (2018)