Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Test Generation for Weak Resistive Bridges., , and . ATS, page 265-272. IEEE, (2006)A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture., , and . IEEE J. Solid State Circuits, 41 (12): 2650-2657 (2006)Analysis of Ground Bounce in Deep Sub-Micron Circuits., , and . VTS, page 110-116. IEEE Computer Society, (1997)A New March Test for Process-Variation Induced Delay Faults in SRAMs., , , , , , and . Asian Test Symposium, page 115-122. IEEE Computer Society, (2013)Efficient Trojan Detection via Calibration of Process Variations., and . Asian Test Symposium, page 355-361. IEEE Computer Society, (2012)Design and test of latch-based circuits to maximize performance, yield, and delay test quality., and . ITC, page 94-103. IEEE Computer Society, (2010)ERTG: A test generator for error-rate testing., and . ITC, page 1-10. IEEE Computer Society, (2007)BIST TPG for Combinational Cluster (Glue Logic) Interconnect Testing at Board Level., and . Asian Test Symposium, page 244-252. IEEE Computer Society, (1998)Optimizing redundancy design for chip-multiprocessors for flexible utility functions., and . ITC, page 1-8. IEEE Computer Society, (2014)Switch-level delay test of domino logic circuits., , and . ITC, page 367-376. IEEE Computer Society, (2001)