( en | de | ru )

 

Disambiguation of "Echavarria, Jorge"

Author of the publication

copydeleteadd this publication to your clipboard
IP-cores watermarking scheme at behavioral level using genetic algorithms.

, , , , and . Eng. Appl. Artif. Intell., (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Arturo Escobosa Echavarría

Jay Jorgenson

Konrad Jörgens

Helmut Jörgens

Ingeborg Jörges

 

Other publications of authors with the same name

Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains., , , , , and . it Inf. Technol., 64 (3): 89-98 (2022)Probabilistic Error Propagation through Approximated Boolean Networks., , , and . DAC, page 1-6. IEEE, (2020)Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*., , , , , , , , , and 2 other author(s). ETS, page 1-10. IEEE, (2021)Can Approximate Computing Reduce Power Consumption on FPGAs?, , , , and . ICECS, page 841-844. IEEE, (2018)On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains., , , , , and . CoRR, (2021)AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs., , and . FPT, page 326-329. IEEE, (2018)IP-cores watermarking scheme at behavioral level using genetic algorithms., , , , and . Eng. Appl. Artif. Intell., (2021)Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits., , , , and . ICCAD, page 1-9. IEEE, (2021)Approximate Logic Synthesis of Very Large Boolean Networks., , and . DATE, page 1552-1557. IEEE, (2021)On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks.. University of Erlangen-Nuremberg, Germany, (2022)