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A 512-mb DDR3 SDRAM prototype with CIO minimization and self-calibration techniques., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 41 (4): 831-838 (2006)Architecture of a multi-slot main memory system for 3.2 Gbps operation., , , and . ISCAS, page 3857-3860. IEEE, (2010)Fuzzy and entropy facial recognition., and . CoRR, (2014)A 2.3-7 GHz CMOS High Gain LNA Using CS-CS Cascode with Coupling C., , , and . IEICE Trans. Electron., 92-C (8): 1091-1094 (2009)A 0.1-1 GHz CMOS Variable Gain Amplifier Using Wideband Negative Capacitance., , , and . IEICE Trans. Electron., 92-C (10): 1311-1314 (2009)On-Chip Supply Noise Suppression Technique Using Active Inductor., , and . IEICE Trans. Electron., 94-C (5): 917-919 (2011)Room Adaptive Conditioning Method for Sound Event Classification in Reverberant Environments., , , and . ICASSP, page 870-874. IEEE, (2021)Continuous-time synthesizing robust sampled-data dynamic output-feedback controllers for uncertain nonlinear systems in Takagi-Sugeno form: A descriptor representation approach., , and . Inf. Sci., (2021)Universal voice-enabled user interfaces using JavaScript., , and . IUI Companion, page 81-82. ACM, (2019)CI-GAN : Co-Clustering By Information Maximizing Generative Adversarial Networks., , and . ICME, page 1-6. IEEE, (2021)