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Disambiguation of "Segura, Jaume"

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Statistical characterization and modeling of random telegraph noise effects in 65nm SRAMs cells.

, , , , , , , and . SMACD, page 1-4. IEEE, (2017)

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Johan Segura

Mathieu Jaume

Rafel Jaume Deyà

Rodrigo Segura

Jaume Tió Casacuberta

 

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Sensitization Input Vector Impact on Propagation Delay for Nanometer CMOS ICs: Analysis and Solutions., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1557-1569 (2014)A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs, , , , and . CoRR, (2007)GHz Testing and Its Fuzzy Targets., and . ITC, page 1228. IEEE Computer Society, (2002)Dynamic critical resistance: a timing-based critical resistance model for statistical delay testing of nanometer ICs., , , and . DATE, page 1271-1276. EDA Consortium, San Jose, CA, USA, (2007)SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results., , , , and . CoRR, (2024)Adaptive static and dynamic noise margin improvement in minimum-sized 6T-SRAM cells., , , and . Microelectron. Reliab., 54 (11): 2613-2620 (2014)Resistive bridge defect detection enhancement under parameter variations combining Low VDD and body bias in a delay based test., , , and . Microelectron. Reliab., 52 (11): 2799-2804 (2012)A compact gate-level energy and delay model of dynamic CMOS gates., , and . IEEE Trans. Circuits Syst. II Express Briefs, 52-II (10): 685-689 (2005)Cumulative-sum-based localization of sound events in low-cost wireless acoustic sensor networks., , , , and . IEEE ACM Trans. Audio Speech Lang. Process., 22 (12): 1792-1802 (2014)Impact of increasing the fin height on soft error rate and static noise margin in a FinFET-based SRAM cell., , , , and . LATS, page 1-6. IEEE Computer Society, (2015)