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An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.

Z. Lin, Y. Xie, P. Zou, S. Wang, J. Yu, and J. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (9): 3092-3103 (2022)

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Zhifeng Zhuang

Zhifeng Xue

Zhifeng Sun

Lin Lin

Other publications of authors with the same name

Distributed Matrix Multiplication Using Speed Adaptive Coding.K. Narra, Z. Lin, M. Kiamari, S. Avestimehr, and M. Annavaram. CoRR, (2019)Train Where the Data is: A Case for Bandwidth Efficient Coded Training.Z. Lin, K. Narra, M. Yu, S. Avestimehr, and M. Annavaram. CoRR, (2019)An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.Z. Lin, Y. Xie, P. Zou, S. Wang, J. Yu, and J. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (9): 3092-3103 (2022)Collage Inference: Using Coded Redundancy for Lowering Latency Variation in Distributed Image Classification Systems.H. Narra, Z. Lin, G. Ananthanarayanan, S. Avestimehr, and M. Annavaram. ICDCS, page 453-463. IEEE, (2020)Time-Division Multiplexing Based System-Level FPGA Routing for Logic Verification.P. Zou, Z. Lin, X. Shi, Y. Wu, J. Chen, J. Yu, and Y. Chang. DAC, page 1-6. IEEE, (2020)Slack squeeze coded computing for adaptive straggler mitigation.K. Narra, Z. Lin, M. Kiamari, S. Avestimehr, and M. Annavaram. SC, page 14:1-14:16. ACM, (2019)Wireless Location on CPN Correction Environmental Factors.Z. Lin, J. Wen, and Q. Chen. CIS, page 129-133. IEEE Computer Society, (2014)Jupiter: A Networked Computing Architecture.P. Ghosh, Q. Nguyen, P. Sakulkar, A. Knezevic, J. Tran, J. Wang, Z. Lin, B. Krishnamachari, M. Annavaram, and S. Avestimehr. CoRR, (2019)Using 3D Convolutional Networks with Shortcut Connections for Improved Lung Nodules Classification.Z. Lin, J. Zheng, and W. Hu. BDE, page 42-49. ACM, (2020)Clock-Aware Placement for Large-Scale Heterogeneous FPGAs.J. Chen, Z. Lin, Y. Kuo, C. Huang, Y. Chang, S. Chen, C. Chiang, and S. Kuo. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (12): 5042-5055 (2020)

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Disambiguation of "Lin, Zhifeng"

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URL
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An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.

Please choose a person to relate this publication to

Zhifeng Zhuang

Zhifeng Xue

Zhifeng Sun

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lin, Zhifeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.

Please choose a person to relate this publication to

Zhifeng Zhuang

Zhifeng Xue

Zhifeng Sun

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.