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A Generalized Precompiling scheme for Surviving Path Memory Management in Viterbi decoders., and . ISCAS, page 1579-1582. IEEE, (1993)Short Frame Transmission at Very Low SNR by Associating CCSK Modulation With NB-Code., , and . IEEE Trans. Wirel. Commun., 21 (9): 7194-7206 (2022)Integer Ring Sieve (IRS) for Constructing Compact QC-LDPC Codes with Large Girth., and . CoRR, (2020)Non-Binary LDPC Codes Defined Over the General Linear Group: Finite Length Design and Practical Implementation Issues., , , , , and . VTC Spring, IEEE, (2009)Optimization of Data-Flow Computations Using Canonical TED Representation., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (9): 1321-1333 (2009)LDPC decoder architecture for DVB-S2 and DVB-S2X standards., and . SiPS, page 1-5. IEEE, (2015)Parallel Generation of Most Reliable LLRs of a Non-Binary Symbol., , and . IEEE Communications Letters, 23 (10): 1761-1764 (2019)Architecture and Finite Precision Optimization for Layered LDPC Decoders., , and . J. Signal Process. Syst., 65 (2): 185-197 (2011)High-Throughput and Flexible Belief Propagation List Decoder for Polar Codes., , , , , , , and . IEEE Trans. Signal Process., (2024)Turbo-XZ Algorithm: Low-Latency Decoders for Quantum LDPC Codes., , and . ISTC, page 1-5. IEEE, (2023)