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Disambiguation of "Matsuda, Yoshio"

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A 100-MHz 51.2-Gb/s Packet Lookup Engine with Automatic Table Update Function.

, , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (10): 2123-2134 (2017)

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Yoshio Sakurayama

Yoshio Inoguchi

Tsuyoshi Matsuda

Yoshio Hara

Yoshio Abe

 

Other publications of authors with the same name

Design and Implementation of Ultra-Low-Latency Video Encoder Using High-Level Synthesis., , , , , and . ISPACS, page 1-2. IEEE, (2019)Scalable Architecture for High-Resolution Real-time Optical Flow Processor., , , , and . IoTaIS, page 248-253. IEEE, (2019)Duality relation for n-layered potts model, , and . Physica A: Statistical and Theoretical Physics, 117 (1): 17--27 (January 1983)Vehicle detection and tracking with affine motion segmentation in stereo video., and . ICSIPA, page 271-276. IEEE, (2011)Users' Content Memorization in Multi-User Interactive Public Displays., , , , and . Int. J. Hum. Comput. Interact., 38 (5): 447-455 (2022)A 622-Mb/s bit/frame synchronizer for high-speed backplane data communication., , , and . IEEE J. Solid State Circuits, 31 (7): 1063-1066 (1996)Ultra-low-latency Video Coding Method for Autonomous Vehicles and Virtual Reality Devices., , , , and . IOTAIS, page 155-161. IEEE, (2018)A study on fast motion estimation algorithm., , , , , and . GCCE, page 1-3. IEEE, (2016)Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 686-690 (2014)A VGA 30 fps Affine Motion Model Estimation VLSI for Real-Time Video Segmentation., , and . IEICE Trans. Inf. Syst., 93-D (12): 3284-3293 (2010)