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Disambiguation of "Rakai, Logan M."

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A fast force-directed simulated annealing for 3D IC partitioning.

, , , and . Integr., (2016)

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Meenakshi B Loganathan

Paul E Logan

Emily Máire Logan

Sivakkanan Loganathan

Simon M M Laimer

 

Other publications of authors with the same name

A Multilevel Congestion-Based Global Router., , , and . VLSI Design, (2009)Wirelength and congestion estimation for routability-driven placement., , , and . SLIP, page 1. IEEE Computer Society, (2011)Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes., , , and . ISPD, page 154-161. ACM, (2013)Optimal gate sizing using a self-tuning multi-objective framework., , , and . Integr., 47 (3): 347-355 (2014)A fast force-directed simulated annealing for 3D IC partitioning., , , and . Integr., (2016)Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (4): 532-545 (2014)A pre-placement net length estimation technique for mixed-size circuits., , and . SLIP, page 45-52. ACM, (2009)A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications., , , and . ACM Great Lakes Symposium on VLSI, page 305-310. ACM, (2013)GPU-Accelerated Solutions to Optimal Power Flow Problems., and . HICSS, page 2511-2516. IEEE Computer Society, (2014)An algebraic multigrid-based algorithm for circuit clustering., , , and . Appl. Math. Comput., 218 (9): 5202-5216 (2012)