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A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS.

P. Kumar, V. Vaidya, H. Krishnamurthy, S. Kim, G. Matthew, S. Weng, B. Thiruvengadam, W. Proefrock, K. Ravichandran, and V. De. CICC, page 1-4. IEEE, (2015)

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Matthew E Gordley

Kenneth E M George

Matthew Mellon

Matthew David

Olumuyiwa Matthew

Other publications of authors with the same name

A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS.H. Krishnamurthy, V. Vaidya, P. Kumar, R. Jain, S. Weng, S. Kim, G. Matthew, N. Desai, X. Liu, K. Ravichandran and 2 other author(s). IEEE J. Solid State Circuits, 53 (1): 8-19 (2018)A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS.H. Krishnamurthy, V. Vaidya, P. Kumar, G. Matthew, S. Weng, B. Thiruvengadam, W. Proefrock, K. Ravichandran, and V. De. VLSIC, page 1-2. IEEE, (2014)A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS.P. Kumar, V. Vaidya, H. Krishnamurthy, S. Kim, G. Matthew, S. Weng, B. Thiruvengadam, W. Proefrock, K. Ravichandran, and V. De. CICC, page 1-4. IEEE, (2015)A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS.H. Krishnamurthy, S. Weng, G. Matthew, N. Desai, R. Saraswat, K. Ravichandran, J. Tschanz, and V. De. IEEE J. Solid State Circuits, 53 (4): 1038-1048 (2018)An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and $V_MIN$ Optimization.P. Meinerzhagen, C. Tokunaga, A. Malavasi, V. Vaidya, A. Mendon, D. Mathaikutty, J. Kulkarni, C. Augustine, M. Cho, S. Kim and 19 other author(s). IEEE J. Solid State Circuits, 54 (1): 144-157 (2019)20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS.H. Krishnamurthy, V. Vaidya, S. Weng, K. Ravichandran, P. Kumar, S. Kim, R. Jain, G. Matthew, J. Tschanz, and V. De. ISSCC, page 336-337. IEEE, (2017)

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Disambiguation of "Matthew, George E."