Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications., , , , , , and . IEEE J. Solid State Circuits, 47 (6): 1483-1496 (2012)A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro., , , , , , , , , and . IEEE J. Solid State Circuits, 48 (9): 2250-2259 (2013)A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 48 (3): 878-891 (2013)Degradation algorithm of compressive sensing for integer DCT with application to H. 264/AVC., , and . ISPACS, page 42-46. IEEE, (2013)A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability., , , , , , , , , and 12 other author(s). ISSCC, page 200-202. IEEE, (2011)A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips., , , , , , , and . APCCAS, page 695-698. IEEE, (2014)Deep Learning-Enabled Swallowing Monitoring and Postoperative Recovery Biosensing System., , , , , , , and . CoRR, (2023)An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory., , , , , , , , , and . IEEE J. Solid State Circuits, 48 (3): 864-877 (2013)An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory., , , , , , , , , and 3 other author(s). ISSCC, page 206-208. IEEE, (2011)A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time., , , , , , , , and . ISSCC, page 434-436. IEEE, (2012)