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Process scheduling for future multicore processors., , and . INA-OCMC@HiPEAC, page 15-18. ACM, (2011)Change Function of 2D/3D Network-on-Chip., , , , and . CIT, page 181-188. IEEE Computer Society, (2011)Optimal memory controller placement for chip multiprocessor., , and . CODES+ISSS, page 217-226. ACM, (2011)Detection of Lung Contour with Closed Principal Curve and Machine Learning., , , , , and . J. Digit. Imaging, 31 (4): 520-533 (2018)Operating System Processor Scheduler Design for Future Chip Multiprocessor., , , and . ARCS Workshops, page 69-76. VDE Verlag, (2010)DBFS: Dual Best-First Search Mapping Algorithm for Shared-Cache Multicore Processors., and . ICA3PP (1), volume 9528 of Lecture Notes in Computer Science, page 185-198. Springer, (2015)A high-efficiency low-cost heterogeneous 3D network-on-chip design., , , and . NoCArc@MICRO, page 37-42. ACM, (2012)Exploration of a Heterogeneous Concentrated-Sparse On-Chip Interconnect for Energy Efficient Multicore Architecture., , and . CIT, page 204-211. IEEE Computer Society, (2014)Exploration of heuristic scheduling algorithms for 3D multicore processors., , , and . Map2MPSoC/SCOPES, page 22-31. ACM, (2012)Tree-model based mapping for energy-efficient and low-latency Network-on-Chip., , , and . DDECS, page 189-192. IEEE Computer Society, (2010)