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Disambiguation of "Kumar, Akash"

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Exploiting transistor-level reconfiguration to optimize combinational circuits.

, , , , , , and . DATE, page 338-343. IEEE, (2017)

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Akash Mehta

Akash Patwari

Hussein Ali Akash

Abdulrhman Ahmed Akasha

Podiyanachari Santhosh Kumar

 

Other publications of authors with the same name

Parallel FPGA Router using Sub-Gradient method and Steiner tree., , , and . CoRR, (2018)ParaDRo: A Parallel Deterministic Router Based on Spatial Partitioning and Scheduling., and . FPGA, page 67-76. ACM, (2018)Communication and migration energy aware design space exploration for multicore systems with intermittent faults., , and . DATE, page 1631-1636. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Design and robust scheduling of nano-satellite swarm for synthetic aperture radar applications., , , and . ICARCV, page 705-710. IEEE, (2014)ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning., , and . FPL, page 1-11. IEEE, (2016)QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning., , , and . FPT, page 230-233. IEEE, (2018)Criticality-aware scrubbing mechanism for SRAM-based FPGAs., , , and . FPL, page 1-8. IEEE, (2014)PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems., and . FPL, page 1-6. IEEE, (2014)Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment., and . FPGA, page 29-39. ACM, (2020)Analyzing composability of applications on MPSoC platforms., , , , and . J. Syst. Archit., 54 (3-4): 369-383 (2008)