( en | de | ru )

 

Disambiguation of "Zeng, Xiaoyang"

Author of the publication

copydeleteadd this publication to your clipboard
A single-routing layered LDPC decoder for 10Gbase-T Ethernet in 130nm CMOS.

, , , , , and . ASP-DAC, page 565-566. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xiaoyang Wang

Xiaoyang Gao

Jian Zeng

Gang Zeng

Lecai Zeng

 

Other publications of authors with the same name

A fast 8×8 IDCT algorithm for HEVC., , , and . ASICON, page 1-4. IEEE, (2013)A Compact and Configurable Long Short-Term Memory Neural Network Hardware Architecture., , , , and . ICIP, page 4168-4172. IEEE, (2018)An ultra low-power and area-efficient baseband processor for WBAN transmitter., , , , and . APSIPA, page 1-4. IEEE, (2013)A full-mode FME VLSI architecture based on 8×8/4×4 adaptive Hadamard Transform for QFHD H.264/AVC encoder., , , and . VLSI-SoC, page 434-439. IEEE, (2011)Extending memory capacity of neural associative memory based on recursive synaptic bit reuse., , and . DATE, page 1603-1606. IEEE, (2017)A low-cost cryptographic processor for security embedded system., , , , , and . ASP-DAC, page 113-114. IEEE, (2008)A high-performance platform-based SoC for information security., , , , and . ASP-DAC, page 122-123. IEEE, (2006)A Skeleton-based Action Recognition System for Medical Condition Detection., , , , and . BioCAS, page 1-4. IEEE, (2019)A Non-Redundant Latch With Key-Node-Upset Obstacle of Beneficial Efficiency for Harsh Environments Applications., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (4): 1639-1648 (April 2023)Efficient Implementation of OFDM Inner Receiver on a Programmable Multi-Core Processor Platform., , , , and . IEICE Trans. Commun., 95-B (4): 1241-1248 (2012)