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Using Sacks to Organize Registers in VLIW Machines.

, , , and . CONPAR, volume 854 of Lecture Notes in Computer Science, page 628-639. Springer, (1994)

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Cost-Conscious Strategies to Increase Performance of Numerical Programs on Aggressive VLIW Architectures., , , and . IEEE Trans. Computers, 50 (10): 1033-1051 (2001)Resource Widening Versus Replication: Limits and Performance-cost Trade-off., , , and . International Conference on Supercomputing, page 441-448. ACM, (1998)A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note)., , , and . Euro-Par, volume 1900 of Lecture Notes in Computer Science, page 194-198. Springer, (2000)Two-level hierarchical register file organization for VLIW processors., , , and . MICRO, page 137-146. ACM/IEEE Computer Society, (2000)Swing module scheduling: a lifetime-sensitive approach., , , and . IEEE PACT, page 80-86. IEEE Computer Society, (1996)Optimizing Program Locality Through CMEs and GAs., , , and . IEEE PACT, page 68-78. IEEE Computer Society, (2003)A comparative study of modulo scheduling techniques., , and . ICS, page 97-106. ACM, (2002)Increasing Memory Bandwidth with Wide Buses: Compiler, Hardware and Performance Trade-Offs., , , and . International Conference on Supercomputing, page 12-19. ACM, (1997)Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units., , , , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 88-97. Springer, (2004)Improved spill code generation for software pipelined loops., , , and . PLDI, page 134-144. ACM, (2000)