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Disambiguation of "Sim, Jae-Yoon"

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A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect.

, , , , and . ISSCC, page 308-310. IEEE, (2019)

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Jae-Han Sim

Jae-Yoon Kim

Unyong Sim

Sim Hägele

Gavin Sim

 

Other publications of authors with the same name

45pW ESD clamp circuit for ultra-low power applications., , , , , and . CICC, page 1-4. IEEE, (2013)A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC., , , and . Journal of Circuits, Systems, and Computers, 25 (12): 1650155:1-1650155:16 (2016)5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop., , , , and . ISSCC, page 94-95. IEEE, (2017)An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator., , , , and . IEICE Trans. Electron., 90-C (6): 1156-1164 (2007)Deadzone-Minimized Systematic Offset-Free Phase Detectors., , , and . IEICE Trans. Electron., 91-C (9): 1525-1528 (2008)An Analysis and Design Methodology of Resistor-Based Phase Error Averaging for Multiphase Generation., , , and . IEICE Trans. Electron., 93-C (12): 1662-1669 (2010)An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (5): 1335-1344 (2015)An Approximate Closed-Form Channel Model for Diverse Interconnect Applications., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (10): 3034-3043 (2014)A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 687-691 (2011)A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (3): 142-146 (2013)