Author of the publication

Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs.

, , , and . Journal of Circuits, Systems, and Computers, 13 (1): 77-100 (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Semi-Automatic Control Unit Generation for Complex VLSI Designs., and . IPSJ Trans. Syst. LSI Des. Methodol., (2010)Machine Learning-Based Adaptive Wireless Interval Training Guidance System., , , , and . Mob. Networks Appl., 17 (2): 163-177 (2012)Congestion minimization during placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (10): 1140-1148 (2000)A weighted Steiner tree-based global router with simultaneous length and density minimization., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (12): 1461-1469 (1994)Correction to "Boundary single-layer routing with movable terminals"., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (5): 638 (1994)Utilization of vacant terminals for improved over-the-cell channel routing., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (6): 780-792 (1993)Boundary single-layer routing with movable terminals., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (11): 1382-1391 (1991)Provably good performance-driven global routing., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (6): 739-752 (1992)Evaluation and optimization of replication algorithms for logic bipartitioning., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (9): 1237-1248 (1999)Guest Editorial., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (1): 1-2 (1998)