( en | de | ru )

 

Disambiguation of "Kauffman, John G."

Author of the publication

copydeleteadd this publication to your clipboard
A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW.

, , , , and . ISSCC, page 154-156. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

John Gabriel Kauffman

Giuseppe G G Manzardo

G Sawers

G Hübner

-G Schaller

 

Other publications of authors with the same name

Low power quantizer design in CT Delta Sigma modulators., , , , and . ISCAS, page 1990-1993. IEEE, (2013)An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR., , , and . IEEE J. Solid State Circuits, 46 (12): 2869-2881 (2011)PVT robust design of wideband CT delta sigma modulators including finite GBW compensation., , and . MWSCAS, page 382-385. IEEE, (2012)Maximizing the Inter-Stage Gain in CT 0-X MASH Delta-Sigma-Modulators., , , , and . ISCAS, page 561-565. IEEE, (2022)A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS., , , , , and . IEEE J. Solid State Circuits, 57 (11): 3407-3417 (2022)Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (7): 2700-2710 (July 2023)A reconfigurable Continuous-Time ΔΣ-ADC using a digitally programmable gm-C array., , , , and . MWSCAS, page 810-813. IEEE, (2012)A 40 kS/sCalibration-Free Incremental △Σ ADC Achieving 104 dB DR and 105.7 dB SFDR., , , , and . ESSCIRC, page 401-404. IEEE, (2023)A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOI., , , , and . ESSCIRC, page 141-144. IEEE, (2023)A Correlation-Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (11): 748-752 (2011)