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A 32Kb SRAM cache using current mode operation and asynchronous wave-pipelined decoders., and . SoCC, page 251-254. IEEE, (2004)Circuit design advances to enable ubiquitous sensing environments., , , , , , and . ISCAS, page 285-288. IEEE, (2010)A dense 45nm half-differential SRAM with lower minimum operating voltage., , , , and . ISCAS, page 57-60. IEEE, (2011)Centip3De: A 64-core, 3D stacked, near-threshold system., , , , , , , , , and 5 other author(s). Hot Chips Symposium, page 1-30. IEEE, (2012)Timing yield enhancement through soft edge flip-flop based design., , , , , , and . CICC, page 543-546. IEEE, (2008)Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor., , , , , , , , , and 4 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (12): 3152-3162 (2013)A cubic-millimeter energy-autonomous wireless intraocular pressure monitor., , , , , , , , , and 2 other author(s). ISSCC, page 310-312. IEEE, (2011)A New Test Methodology For DNL Error In Flash ADC's., , , and . DFT, page 582-590. IEEE Computer Society, (2005)Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 48 (1): 104-117 (2013)Portless SRAM - A High-Performance Alternative to the 6T Methodology., , and . IEEE J. Solid State Circuits, 42 (11): 2600-2610 (2007)