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An Efficient Linear Time Algorithm for Scan Chain Optimization and Repartitioning.

, , and . ITC, page 781-787. IEEE Computer Society, (2002)

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Physical synthesis for ASIC datapath circuits., , , , and . ISCAS (3), page 365-368. IEEE, (2002)LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay., , , and . ICCAD, page 516-519. IEEE Computer Society, (1999)An Efficient Linear Time Algorithm for Scan Chain Optimization and Repartitioning., , and . ITC, page 781-787. IEEE Computer Society, (2002)Extracting Local Don't Cares for Network Optimization., , and . ICCAD, page 514-517. IEEE Computer Society, (1991)m-Inductive Property of Sequential Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (6): 919-930 (2016)Combinational techniques for sequential equivalence checking., , , and . FMCAD, page 145-149. IEEE, (2010)Sequential Circuit Design Using Synthesis and Optimization., , , , , and . ICCD, page 328-333. IEEE Computer Society, (1992)SLIP: a software environment for system level interactive partitioning., , , , , and . ICCAD, page 280-283. IEEE Computer Society, (1989)Observability Relations and Observability Don't Cares., and . ICCAD, page 518-521. IEEE Computer Society, (1991)Implicit State Enumeration of Finite State Machines Using BDDs., , , , and . ICCAD, page 130-133. IEEE Computer Society, (1990)