Author of the publication

A fault tolerant cache system of automotive vision processor complying with ISO26262.

, , , and . ISCAS, page 2912. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Function-Safe Vehicular AI Processor with Nano Core-In-Memory Architecture., , , , , , , , , and . AICAS, page 127-131. IEEE, (2019)Chiplet Heterogeneous-Integration AI Processor., , , , , , , , , and 5 other author(s). ICEIC, page 1-2. IEEE, (2023)Backward Graph Construction and Lowering in DL Compiler for Model Training on AI Accelerators., , and . ISOCC, page 91-92. IEEE, (2022)AIWareK: Compiling PyTorch Model for AI Processor Using MLIR Framework., , , , , and . AICAS, page 463-465. IEEE, (2022)HPC LINPACK Parameter Optimization on Homo-/Heterogeneous System of ARM Neoverse N1SDP., , , , , , and . HPC Asia, page 139-143. ACM, (2021)A fault tolerant cache system of automotive vision processor complying with ISO26262., , , and . ISCAS, page 2912. IEEE, (2016)Implementation of Yolo-v2 Image Recognition and Other Testbenches for a CNN Accelerator., , , , , , , , , and 1 other author(s). ICCE-Berlin, page 242-247. IEEE, (2019)A 1GHz fault tolerant processor with dynamic lockstep and self-recovering cache for ADAS SoC complying with ISO26262 in automotive electronics., , , and . A-SSCC, page 313-316. IEEE, (2017)ArtBrain-K: AI Processor based-on 5-PetaFLOPS AI Server System., , , , , , , , , and 2 other author(s). AICAS, page 466-468. IEEE, (2022)M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations., , , , , , , , , and . AICAS, page 150-153. IEEE, (2022)