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Disambiguation of "Tsukamoto, Akira"

Author of the publication

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Liquid-Phase Detection of Biological Targets with Magnetic Marker and Superconducting Quantum Interference Device.

, , , , , , , , , , , and . IEICE Trans. Electron., 92-C (3): 315-322 (2009)

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Masaji Tsukamoto

Akira Hayashima

Masaaki Tsukamoto

Akira Hori

Akira Satake

 

Other publications of authors with the same name

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture., , , , , , , and . HCS, page 1-16. IEEE, (2021)Library Implementation and Performance Analysis of GlobalPlatform TEE Internal API for Intel SGX and RISC-V Keystone., , , and . TrustCom, page 1200-1208. IEEE, (2020)Scalable Overlay Network Deployment for Dynamic Collaborative Groups., , , and . SAINT, page 102-109. IEEE Computer Society, (2005)Quick Boot of Trusted Execution Environment With Hardware Accelerators., , , , , , and . IEEE Access, (2020)Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure., , , , , and . IEEE Access, (2021)TS-Perf: General Performance Measurement of Trusted Execution Environment and Rich Execution Environment on Intel SGX, Arm TrustZone, and RISC-V Keystone., , , and . IEEE Access, (2021)An in vitro model of temporal enhancement of epithelium barrier permeability by low-energy shock waves without contrast agents., , , , , and . Medical Biol. Eng. Comput., 58 (9): 1987-1993 (2020)ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3., , , , , , and . ISOCC, page 17-18. IEEE, (2021)Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB)., , , , , , , , , and 1 other author(s). IEICE Electron. Express, 17 (20): 20200282 (2020)Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling., , , , , , , and . IEEE Access, (2022)