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14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC.

M. Kar, J. Silberman, S. Venkataramani, V. Srinivasan, B. Fleischer, J. Rubin, J. Lancaster, S. Lee, M. Cohen, M. Ziegler, N. Cao, S. Woodward, A. Agrawal, C. Zhou, P. Chatarasi, T. Gooding, M. Guillorn, B. Hekmatshoartabari, P. Jacob, R. Jain, S. Jain, J. Jung, K. Kim, S. Koswatta, M. Lutz, A. Mannari, A. Mathew, I. Nair, A. Ranjan, Z. Ren, S. Rider, T. Roewer, D. Satterfield, M. Schaal, S. Sen, G. Tellez, H. Tran, W. Wang, V. Zalani, J. Zhang, X. Zhang, V. Shah, R. Senger, A. Kumar, P. Lu, and L. Chang. ISSCC, page 254-256. IEEE, (2024)

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Extending Polyhedral Model for Analysis and Transformation of OpenMP Programs.P. Chatarasi, and V. Sarkar. PACT, page 490-491. IEEE Computer Society, (2015)MARVEL: A Decoupled Model-driven Approach for Efficiently Mapping Convolutions on Spatial DNN Accelerators.P. Chatarasi, H. Kwon, N. Raina, S. Malik, V. Haridas, T. Krishna, and V. Sarkar. CoRR, (2020)Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators.G. Jeong, G. Kestor, P. Chatarasi, A. Parashar, P. Tsai, S. Rajamanickam, R. Gioiosa, and T. Krishna. PACT, page 30-44. IEEE, (2021)Advancing Compiler Optimizations for General-Purpose & Domain-Specific Parallel Architectures.P. Chatarasi. Georgia Institute of Technology, Atlanta, GA, USA, (2021)base-search.net (ftgeorgiatech:oai:smartech.gatech.edu:1853/64099).A Unified Approach to Variable Renaming for Enhanced Vectorization.P. Chatarasi, J. Shirako, A. Cohen, and V. Sarkar. LCPC, volume 11882 of Lecture Notes in Computer Science, page 1-20. Springer, (2018)Experimental Insights from the Rogues Gallery.J. Young, E. Riedy, T. Conte, V. Sarkar, P. Chatarasi, and S. Srikanth. ICRC, page 80-87. IEEE, (2019)Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine.P. Chatarasi, S. Neuendorffer, S. Bayliss, K. Vissers, and V. Sarkar. HPEC, page 1-10. IEEE, (2020)Understanding Reuse, Performance, and Hardware Cost of DNN Dataflow: A Data-Centric Approach.H. Kwon, P. Chatarasi, M. Pellauer, A. Parashar, V. Sarkar, and T. Krishna. MICRO, page 754-768. ACM, (2019)A Preliminary Study of Compiler Transformations for Graph Applications on the Emu System.P. Chatarasi, and V. Sarkar. MCHPC@SC, page 37-44. ACM, (2018)An Extended Polyhedral Model for SPMD Programs and Its Use in Static Data Race Detection.P. Chatarasi, J. Shirako, M. Kong, and V. Sarkar. LCPC, volume 10136 of Lecture Notes in Computer Science, page 106-120. Springer, (2016)

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14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC.

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14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC.