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A simulation-based approach to test pattern generation for synchronous sequential circuits.

, , , and . VTS, page 263-267. IEEE Computer Society, (1992)

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Test Pattern Generation Under Low Power Constraints., , , and . EvoWorkshops, volume 1596 of Lecture Notes in Computer Science, page 162-170. Springer, (1999)SAARA: a simulated annealing algorithm for test pattern generation for digital circuits., , , and . SAC, page 228-232. ACM, (1997)Simulation-based verification of network protocols performance., , , , , and . CHARME, volume 105 of IFIP Conference Proceedings, page 236-251. Chapman & Hall, (1997)An Agent Based Autonomic Semantic Platform., , and . ICAC, page 189-196. IEEE Computer Society, (2004)Cellular automata for deterministic sequential test pattern generation., , , and . VTS, page 60-67. IEEE Computer Society, (1997)On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits., , , and . VTS, page 424-429. IEEE Computer Society, (1998)Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience., , , , and . DATE, page 385-389. IEEE Computer Society / ACM, (2000)On the test of microprocessor IP cores., , , and . DATE, page 209-213. IEEE Computer Society, (2001)A genetic algorithm-based system for generating test programs for microprocessor IP cores., , , and . ICTAI, page 195-198. IEEE Computer Society, (2000)Automatic Test Program Generation from RT-Level Microprocessor Descriptions., , , and . ISQED, page 120-125. IEEE Computer Society, (2002)