Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Study of Errant Pipeline Flushes Caused by Value Misspeculation., , and . SBAC-PAD, page 32-39. IEEE Computer Society, (2004)Indirect Branch Prediction Using Data Compression Techniques., and . J. Instruction-Level Parallelism, (1999)High-Speed Parallel-Prefix Modulo 2n-1 Adders., , , , and . IEEE Trans. Computers, 49 (7): 673-680 (2000)Temperature-Aware Sizing of Multi-Chip Module Accelerators for Multi-DNN Workloads., , , , and . DATE, page 1-6. IEEE, (2023)On Characterizing Near-Threshold SRAM Failures in FinFET Technology., , , and . DAC, page 53:1-53:6. ACM, (2017)A Method for Hiding the Increased Non-Volatile Cache Read Latency., , , , and . CoRR, (2021)Temporal-Based Procedure Reordering for Improved Instruction Cache Performance., and . HPCA, page 244-253. IEEE Computer Society, (1998)Parallel computation of higher order moments on the MasPar-1 machine., and . ICASSP, page 1832-1835. IEEE Computer Society, (1995)Assessing the Effects of Low Voltage in Branch Prediction Units., , , , and . ISPASS, page 127-136. IEEE, (2019)Analysis of Temporal-Based Program Behavior for Improved Instruction Cache Performance., , , and . IEEE Trans. Computers, 48 (2): 168-175 (1999)