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Evaluation of low-energy and high-performance processor using variable stages pipeline technique., , , , and . IET Comput. Digit. Tech., 2 (3): 230-238 (2008)Concurrent and collaborative methodologies in short TAT LSI design and manufacturing., , , , , , and . Syst. Comput. Jpn., 30 (7): 79-91 (1999)A Rapid Verification Framework for Developing Multi-core Processor., , , and . CANDAR, page 388-394. IEEE Computer Society, (2016)Measurement of Low-Energy Processor Chip Using Fine-Grain Variable Stages Pipeline Architecture., , , and . ICNC, page 293-297. IEEE Computer Society, (2012)FabCache: Cache Design Automation for Heterogeneous Multi-core Processors., , , and . CANDAR, page 602-606. IEEE Computer Society, (2013)A cache memory with unit tile and line accessibility., , , and . ICIS, page 1-6. IEEE Computer Society, (2016)A real-time motion estimation and compensation LSI with wide search range for MPEG2 video encoding., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 31 (11): 1733-1741 (1996)Two-chip MPEG-2 video encoder., , , , , , , , , and 7 other author(s). IEEE Micro, 16 (2): 51-58 (1996)A large scale cellular array processor: AAP-1., , , , and . ACM Conference on Computer Science, page 100-111. ACM, (1985)Automatic position findings of vehicle by means of laser., , and . ICRA, page 1343-1348. IEEE, (1986)