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Guest Editors' Introduction: Speeding Up Analog Integration and Test for Mixed-Signal SoCs.

, , and . IEEE Des. Test, 32 (1): 6-8 (2015)

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Guest Editors' Introduction: Speeding Up Analog Integration and Test for Mixed-Signal SoCs., , and . IEEE Des. Test, 32 (1): 6-8 (2015)Application of computers in development of a total artificial heart., , , , and . CBMS, page 164-168. IEEE, (1989)Diana Past, Present, and Future.. Ada Software Tools Interfaces, volume 180 of Lecture Notes in Computer Science, page 3-22. Springer, (1983)What we know after twelve years developing and deploying test data analytics solutions., , and . ITC, page 1-8. IEEE, (2016)CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology., , , and . DAC, page 597-600. ACM, (1988)Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling., , , , , and . ITC, page 1-10. IEEE Computer Society, (2014)Facilitating Rapid First Silicon Debug., , and . ITC, page 628-637. IEEE Computer Society, (2002)Modeling Test Escape Rate as a Function of Multiple Coverages., , and . ITC, page 1-9. IEEE Computer Society, (2008)The roles of controllability and observability in design for test., , , and . VTS, page 211-216. IEEE Computer Society, (1992)Test Generation and Design for Test for a Large Multiprocessing DSP., , , and . ITC, page 149-156. IEEE Computer Society, (1995)