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Impact of SoC power management techniques on verification and testing.

, , , , and . ISQED, page 692-695. IEEE Computer Society, (2009)

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Panel: SoC power management implications on validation and testing., , , , , and . HLDVT, page 135-137. IEEE Computer Society, (2008)Evaluation of an efficient control-oriented coverage metric., , and . HLDVT, page 153-157. IEEE Computer Society, (2008)Interactive presentation: Automatic generation of functional coverage models from behavioral verilog descriptions., , and . DATE, page 900-905. EDA Consortium, San Jose, CA, USA, (2007)Tutorial: SoC Power Management Verification and Testing Issues., , , , and . MTV, page 67-72. IEEE Computer Society, (2008)Error Detection Using Model Checking vs. Simulation., , and . HLDVT, page 55-58. IEEE Computer Society, (2006)A Special Issue on Low Power Design and Verification Techniques.. J. Low Power Electron., 7 (1): 1 (2011)Impact of SoC power management techniques on verification and testing., , , , and . ISQED, page 692-695. IEEE Computer Society, (2009)Power Management Design and Verification., and . J. Low Power Electron., 7 (1): 41-48 (2011)Panel: Software practices for verification/testbench management., , , , , and . HLDVT, page 35-37. IEEE Computer Society, (2008)An efficient control-oriented coverage metric., , and . ASP-DAC, page 317-322. ACM Press, (2005)