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Disambiguation of "Nakamura, Ken"

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OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization.

, , , , , , , and . MWSCAS, page 1-4. IEEE, (2022)

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Shin'ichiro Nakamura

Makoto Nakamura

Akira Nakamura

Ken Lau

Ken Endo

 

Other publications of authors with the same name

A Single-Chip 4K 60-fps 4: 2: 2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 26 (10): 1930-1938 (2018)Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability., , , , , , , , , and 5 other author(s). VLSIC, page 54-. IEEE, (2015)A Low Power Motion Estimation Engine with Adaptive Bit-Shifted SAD Calculation., , , , and . ISCAS, page 1-5. IEEE, (2019)An HEVC real-time encoding system with high quality HDR color representations., , , , , , and . ICCE, page 1-2. IEEE, (2018)A Low-Latency 4K HEVC Multi-Channel Encoding System with Content-Aware Bitrate Control for Live Streaming., , , , , , and . IEICE Trans. Inf. Syst., 106 (1): 46-57 (2023)A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems., , , , , , , , , and . CICC, page 177-180. IEEE, (2003)An MMT Module for 4K/120fps Temporally Scalable Video., , , , and . ISCAS, page 1-5. IEEE, (2019)Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1055-1059 (2007)An Efficient Reference Image Sharing Method for the Image-Division Parallel Video Encoding Architecture., , , , , , , and . IEICE Trans. Electron., 106 (6): 312-320 (June 2023)Scalable architecture for use in an over-HDTV real-time codec system for multiresolution video., , , and . VCIP, volume 5150 of Proceedings of SPIE, page 1752-1759. SPIE, (2003)