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Integrating time from experience in the lateral entorhinal cortex., , , , , , and . Nat., 561 (7721): 57-62 (2018)Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay., and . EURO-DAC, page 440-445. IEEE Computer Society, (1994)Clock Scheduling for Power Supply Noise Suppression using Genetic Algorithm with Selective Gene Therapy., , and . ISQED, page 327-332. IEEE Computer Society, (2003)On the Bounded-Skew Clock and Steiner Routing Problems., , and . DAC, page 508-513. ACM Press, (1995)Power Supply Noise Suppression via Clock Skew Scheduling., , and . ISQED, page 355-360. IEEE Computer Society, (2002)Low-cost single-layer clock trees with exact zero Elmore delay skew., and . ICCAD, page 213-218. IEEE Computer Society / ACM, (1994)Practical Bounded-Skew Clock Routing., and . VLSI Signal Processing, 16 (2-3): 199-215 (1997)Bounded-skew clock and Steiner routing., , , and . ACM Trans. Design Autom. Electr. Syst., 3 (3): 341-388 (1998)Bounded-skew clock and Steiner routing under Elmore delay., , , and . ICCAD, page 66-71. IEEE Computer Society / ACM, (1995)Best-so-far vs. where-you-are: New perspectives on simulated annealing for CAD., , and . EURO-DAC, page 78-83. IEEE Computer Society, (1993)